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Low Power, High Precision Operational Amplifier OP97
FEATURES Low Supply Current: 600 A Max OP07 Type Performance Offset Voltage: 20 V Max Offset Voltage Drift: 0.6 V/ C Max Very Low Bias Current 25 C: 100 pA Max -55 C to +125 C: 250 pA Max High Common-Mode Rejection: 114 dB Min Extended Industrial Temperature Range: -40 C to +85 C PIN CONNECTIONS 8-Lead PDIP (P Suffix) 8-Lead SOIC (S Suffix)
NULL 1 -IN 2 +IN 3 V- 4
OP97
8 NULL 7 V+ 6 OUT 5 OVER COMP
GENERAL DESCRIPTION
The OP97 is a low power alternative to the industry-standard OP07 precision amplifier. The OP97 maintains the standards of performance set by the OP07 while utilizing only 600 A supply current, less than 1/6 that of an OP07. Offset voltage is an ultralow 25 V, and drift over temperature is below 0.6 V/C. External offset trimming is not required in the majority of circuits. Improvements have been made over OP07 specifications in several areas. Notable is bias current, which remains below 250 pA over the full military temperature range. The OP97 is ideal for use in precision long-term integrators or sample-and-hold circuits that must operate at elevated temperatures.
Common-mode rejection and power supply rejection are also improved with the OP97, at 114 dB minimum over wider ranges of common-mode or supply voltage. Outstanding PSR, a supply range specified from 2.25 V to 20 V and the OP97's minimal power requirements combine to make the OP97 a preferred device for portable and battery-powered instruments. The OP97 conforms to the OP07 pinout, with the null potentiometer connected between Pins 1 and 8 with the wiper to V+. The OP97 will upgrade circuit designs using 725, OP05, OP07, OP12, and 1012 type amplifiers. It may replace 741-type amplifiers in circuits without nulling or where the nulling circuitry has been removed.
REV. E
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective companies.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 (c) 2003 Analog Devices, Inc. All rights reserved.
OP97-SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
Parameter Input Offset Voltage Long-Term Offset Voltage Stability Input Offset Current Input Bias Current Input Noise Voltage Input Noise Voltage Density Input Noise Current Density Large-Signal Voltage Gain Common-Mode Rejection Power-Supply Rejection Input Voltage Range3 Output Voltage Swing Slew Rate Differential Input Resistance4 Closed-Loop Bandwidth Supply Current Supply Voltage Symbol VOS VOS/Time IOS IB en p-p en in AVO CMR PSR IVR VO SR RIN BW ISY VS
(@ VS =
15 V, VCM = 0 V, TA = 25 C, unless otherwise noted.)
Min OP97E Typ 10 0.3 30 30 0.5 17 14 20 2000 132 132 14.0 14 0.2 0.9 380 15 Max 25 Min OP97F Typ 30 0.3 30 30 0.5 17 14 20 2000 132 132 14.0 14 0.2 0.9 380 15 Max 75 Unit V V/Month pA pA V p-p nV/Hz nV/Hz fA/Hz V/mV dB dB V V V/s M MHz A V
Conditions
100 100 30 22 200 110 110 13.5 13 0.1 30 0.4 600 20 2
150 150 30 22
0.1 Hz to 10 Hz fO = 10 Hz1 fO = 1000 Hz2 fO = 10 Hz VO = 10 V; RL = 2 k VCM = 13.5 V VS = 2 V to 20 V RL = 10 k
AVCL = 1 Operating Range
300 114 114 13.5 13 0.1 30 0.4 2
600 20
NOTES 1 10 Hz noise voltage density is sample tested. Devices 100% tested for noise are available on request. 2 Sample tested. 3 Guaranteed by CMR test. 4 Guaranteed by design. Specifications subject to change without notice.
ELECTRICAL CHARACTERISTICS
Parameter Input Offset Voltage Average Temperature Coefficient of VOS Input Offset Current Average Temperature Coefficient of IOS Input Bias Current Average Temperature Coefficient of IB Large Signal Voltage Gain Common-Mode Rejection Power Supply Rejection Input Voltage Range* Output Voltage Swing Slew Rate Supply Current Supply Voltage *Guaranteed by CMR test. Specifications subject to change without notice. Symbol VOS TCVOS IOS TCIOS IB TCIB AVO CMR PSR IVR VO SR ISY VS
(@ VS =
15 V, VCM = 0 V, -40 C TA +85 C for the OP97E/F, unless otherwise noted.)
OP97E Typ 25 0.2 60 0.4 60 OP97F Typ 60 0.3 0.3 80 0.6 80 150 108 108 13.5 13 0.05 800 20 2.5 0.6 1000 128 128 14.0 14 0.15 400 15
Conditions S-Package
Min
Max 60 0.6 250 2.5 250 2.5
Min
Max 200 2.0 750 7.5 750 7.5
Unit V V/C pA pA/C pA pA/C V/mV dB dB V V V/s A V
VO = 10 V; RL = 2 k VCM = 13.5 V VS = 2.5 V to 20 V RL = 10 k
200 108 108 13.5 13 0.05 2.5
Operating Range
0.4 1000 128 126 14.0 14 0.15 400 15
800 20
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REV. E
OP97
ABSOLUTE MAXIMUM RATINGS 1 ORDERING GUIDE
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 V Input Voltage2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 V Differential Input Voltage3 . . . . . . . . . . . . . . . . . . . . . . . . 1 V Differential Input Current3 . . . . . . . . . . . . . . . . . . . . 10 mA Output Short-Circuit Duration . . . . . . . . . . . . . . . . Indefinite Operating Temperature Range OP97E, OP97F (P, S) . . . . . . . . . . . . . . . . . -40C to +85C Storage Temperature Range . . . . . . . . . . . . -65C to +150C Junction Temperature Range . . . . . . . . . . . . -65C to +150C Lead Temperature (Soldering, 60 sec) . . . . . . . . . . . . . 300C Package Type 8-Lead PDIP (P) 8-Lead SOIC (S)
JA 4 JC
Model OP97EP OP97FP OP97FS OP97FS-REEL OP97FS-REEL7
Temperature Range -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C
Package Description 8-Lead PDIP 8-Lead PDIP 8-Lead SOIC 8-Lead SOIC 8-Lead SOIC
Package Option* N-8 N-8 R-8 R-8 R-8
*For outline information, see Package Information section.
Unit C/W C/W
103 158
43 43
NOTES 1 Absolute maximum ratings apply to both DICE and packaged parts, unless otherwise noted. 2 For supply voltages less than 20 V, the absolute maximum input voltage is equal to the supply voltage. 3 The OP97's inputs are protected by back-to-back diodes. Current-limiting resistors are not used in order to achieve low noise. Differential input voltages greater than 1 V will cause excessive current to flow through the input protection diodes unless limiting resistance is used. 4 JA is specified for worst-case mounting conditions, i.e., JA is specified for device in socket for PDIP package; JA is specified for device soldered to printed circuit board for SOIC package.
CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the OP97 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
REV. E
-3-
OP97-Typical Performance Characteristics
400 1894 UNITS VS = 15V TA = 25 C VCM = 0V 300 400 1920 UNITS VS = 15V TA = 25 C VCM = 0V 500 1894 UNITS 400 VS = 15V TA = 25 C VCM = 0V
NUMBER OF UNITS
NUMBER OF UNITS
NUMBER OF UNITS
300
300
200
200
200
100
100 100
0 -40
-20 0 20 INPUT OFFSET VOLTAGE ( V)
40
0 -100
-50 0 50 INPUT BIAS CURRENT (pA)
100
0 -60
-20 0 20 40 -40 INPUT OFFSET CURRENT (pA)
60
TPC 1. Typical Distribution of Input Offset Voltage
TPC 2. Typical Distribution of Input Bias Current
TPC 3. Typical Distribution of Input Offset Current
60 40
INPUT CURRENT (pA)
60 DEVIATION FROM FINAL VALUE ( V)
5 TA = 25 C VS = 15V TA = 25 C VS = 15V VCM = 0V
TA = 25 C VCM = 0V IB-
40
IB- IB+
4
INPUT CURRENT (pA)
20 IB+ 0
20
3
0 IOS -20
2 J PACKAGES 1 Z, P PACKAGES 0
-20 IOS -40 -60 -75
-40 -60 -15
-50 -25
0
25
50
75
100
125
TEMPERATURE ( C)
-10 -5 0 5 10 COMMON-MODE VOLTAGE (V)
15
0
2 3 4 5 1 TIME AFTER POWER APPLIED (Minutes)
TPC 4. Input Bias, Offset Current vs. Temperature
TPC 5. Input Bias, Offset Current vs. Common-Mode Voltage
TPC 6. Input Offset Voltage Warm-Up Drift
EFFECTIVE OFFSET VOLTAGE DRIFT ( V/ C)
1000
EFFECTIVE OFFSET VOLTAGE ( V)
100
SHORT-CIRCUIT CURRENT (mA)
20
BALANCED OR UNBALANCED VS = 15V VCM = 0V 100 -55 C TA +125 C
BALANCED OR UNBALANCED VS = 15V VCM = 0V 10
15 10 5 0 -5 -10 -15 -20
TA = -55 C TA = +25 C TA = +125 C VS = 15V OUTPUT SHORTED TO GROUND TA = +125 C
10
TA = 25 C
1
TA = +25 C TA = -55 C
1 1k
3k
10k 30k 100k 300k 1M 3M 10M SOURCE RESISTANCE ( )
0.1 1k
10k 100k 1M 10M SOURCE RESISTANCE ( )
100M
0
1 2 TIME FROM OUTPUT SHORT (Minutes)
3
TPC 7. Effective Offset Voltage vs. Source Resistance
TPC 8. Effective TCVOS vs. Source Resistance
TPC 9. Short-Circuit Current vs. Time, Temperature
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REV. E
OP97
450 NO LOAD
COMMON-MODE REJECTION (dB)
140 120 100 80 60 40 20 0
140
425
SUPPLY CURRENT ( A)
POWER-SUPPLY REJECTION (dB)
TA = 25 C VS = 15V VCM = 10V
120
TA = 25 C VS = 15V VS = 10V p-p
400 TA = +125 C 375 TA = +25 C
100 -PSR 80 +PSR 60
350
TA = -55 C
325
40 20 0.1
300 0 10 15 5 SUPPLY VOLTAGE (V) 20
1
10
100 1k 10k FREQUENCY (Hz)
100k
1M
1
10 100 1k 10k FREQUENCY (Hz)
100k
1M
TPC 10. Supply Current vs. Supply Voltage
TPC 11. Common-Mode Rejection vs. Frequency
TPC 12. Power-Supply Rejection vs. Frequency
10000
1000
VOLTAGE NOISE DENSITY (nV/ Hz)
VS = VO = 15V 10V TA = -55 C
1000
TOTAL NOISE DENSITY ( V/ Hz)
10
20V
CURRENT NOISE DENSITY (FA/ Hz)
TA = 25 C VS = 2V TO
TA = 25 C VS = 2V TO
20V
1kHz 10Hz
OPEN-LOOP GAIN (V/mV)
100 CURRENT NOISE
100
1 R R 0.1 10Hz 1kHz RESISTOR NOISE 0.01 102 103 104 105 106 107 SOURCE RESISTANCE ( ) 108 RS = 2R
TA = +25 C 1000 TA = +125 C
VOLTAGE NOISE 10 1/f CORNER 2.5Hz 1/f CORNER 120Hz 1 1 10 100 FREQUENCY (Hz) 1 1000 10
100 1 2 5 10 LOAD RESISTANCE (k ) 20
TPC 13. Open-Loop Gain vs. Load Resistance
TPC 14. Noise Density vs. Frequency
TPC 15. Total Noise Density vs. Source Resistance
DIFFERENTIAL INPUT VOLTAGE (10 V/DIV)
35
RL = 10k VS = 15V VCM = 0V OUTPUT SWING (V p-p)
35
30 25 20 15 10 5
OUTPUT SWING (V p-p)
TA = +125 C
TA = 25 C VS = 15V AVCL = +1 1% THD fO = 1kHz
30 25 20 15 10 5 1 100
TA = 25 C VS = 15V AVCL = 1 1% THD Rl = 10k
TA = +25 C
TA = -55 C -15 -10 -5 0 5 10 OUTPUT VOLTAGE (V) 15
1 10
100 1k LOAD RESISTANCE ( )
10k
10k 1k FREQUENCY (Hz)
100k
TPC 16. Open-Loop Gain Linearity
TPC 17. Maximum Output Swing vs. Load Resistance
TPC 18. Maximum Output Swing vs. Frequency
REV. E
-5-
OP97
80 GAIN 60 40 20 0 -20 -40 -60 100 TA = +125 C TA = -55 C 90 135 180 225
PHASE SHIFT (Degrees) OPEN-LOOP GAIN (dB)
1 10 TA = 25 C VS = 15V RL = 10k 1% THD VOUT = 3V RMS 70 60 50 40 30 20 10 0 10 TA = 25 C VS = 15V AVCL = +1 VOUT = 100mV p-p COC = 0pF
PHASE
+EDGE
0.1 AVCL = 100 0.01 AVCL = 10 0.001 AVCL = 1
OVERSHOOT (%)
THD + N (%)
-EDGE
VS = 15V VS = 15V TA = -55 C CL = 20pF CL = 20pF TA = +125 C RL = 1M RL = 1M 100pF OVERCOMPENSATION 100pF OVERCOMPENSATION 1k 10k 100k FREQUENCY (Hz) 1M
10M
0.0001 10
100 1k FREQUENCY (Hz)
10k
100 1000 LOAD CAPACITANCE (pF)
10000
TPC 19. Open-Loop Gain, Phase vs. Frequency (COC = 0 pF)
TPC 20. Total Harmonic Distortion Plus Noise vs. Frequency
TPC 21. Small Signal Overshoot vs. Capacitive Load
80 GAIN 60 40 20 0 -20 -40 -60 100 VS = 15V TA = +125 C CL = 20pF TA = -55 C RL = 1M 100pF OVERCOMPENSATION 1k 10k 100k FREQUENCY (Hz) 1M 10M TA = -55 C TA = +125 C 90 135 180 225
1 TA = +125 C Rl = 10k VS = 15V CL = 100pF GAIN BANDWIDTH (kHz)
1000 TA = -55 C TA = +125 C 100
PHASE SHIFT (Degrees)
OPEN-LOOP GAIN (dB)
PHASE
SLEW RATE (V/ s)
0.1
TA = -55 C
0.01
10 VS = 15V CL = 20pF RL = 1M AV = 100 1 1 10 100 10000 1000 OVERCOMPENSATION CAPACITOR (pF)
0.001 1 10 100 10000 1000 OVERCOMPENSATION CAPACITOR (pF)
TPC 22. Open-Loop Gain, Phase vs. Frequency (COC = 100 pF)
TPC 23. Slew Rate vs. Overcompensation
TPC 24. Gain Bandwidth Product vs. Overcompensation
80 60 TA = -55 C TA = +25 C TA = +125 C
80 60
PHASE SHIFT (Degrees)
90 PHASE GAIN TA = -55 C TA = +125 C 135 180 225 VS = 15V CL = 20pF RL = 1M 100pF OVERCOMPENSATION 1k 10k 100k FREQUENCY (Hz) 1M 10M
1000
TA = -55 C TA = +25 C TA = +125 C 90 PHASE GAIN TA = +125 C TA = -55 C VS = 15V CL = 20pF RL = 1M 100pF OVERCOMPENSATION 1k 10k 100k FREQUENCY (Hz) 1M 10M 135 180 225
OUTPUT IMPEDANCE ( )
PHASE SHIFT (Degrees)
TA = 25 C VS = 15V 100
OPEN-LOOP GAIN (dB)
40 20 0 -20 -40 -60 100
OPEN-LOOP GAIN (dB)
40 20 0 -20 -40 -60 100
10 AVCL = 1000 1 AVCL = 1
0.1
0.01
0.001 1 10 100 1k FREQUENCY (Hz) 10k 100k
TPC 25. Open-Loop Gain, Phase vs. Frequency (COC = 1000 pF)
TPC 26. Open-Loop Gain, Phase vs. Frequency (COC = 10,000 pF)
TPC 27. Closed-Loop Output Resistance vs. Frequency
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REV. E
OP97
APPLICATION INFORMATION
The OP97 is a low power alternative to the industry-standard precision op amp, the OP07. The OP97 may be substituted directly into OP07, OP77, 725, 112/312, and 1012 sockets with improved performance and/or less power dissipation and may be inserted into sockets conforming to the 741 pinout if nulling circuitry is not used. Generally, nulling circuitry used with earlier generation amplifiers is rendered superfluous by the OP97's extremely low offset voltage and may be removed without compromising circuit performance. Extremely low bias current over the full military temperature range makes the OP97 attractive for use in sample-and-hold amplifiers, peak detectors, and log amplifiers that must operate over a wide temperature range. Balancing input resistances is not necessary with the OP97. Offset voltage and TCVOS are degraded only minimally by high source resistance, even when unbalanced. The input pins of the OP97 are protected against large differential voltage by back-to-back diodes. Current-limiting resistors are not used so that low noise performance is maintained. If differential voltages above 1 V are expected at the inputs, series resistors must be used to limit the current flow to a maximum of 10 mA. Common-mode voltages at the inputs are not restricted and may vary over the full range of the supply voltages used. The OP97 requires very little operating headroom about the supply rails and is specified for operation with supplies as low
+V RPOT = 5k TO 100k
as 2 V. Typically, the common-mode range extends to within 1 V of either rail. The output typically swings to within 1 V of the rails when using a 10 k load. Offset nulling is achieved utilizing the same circuitry as an OP07. A potentiometer between 5 k and 100 k is connected between Pins 1 and 8 with the wiper connected to the positive supply. The trim range is between 300 V and 850 V, depending upon the internal trimming of the device.
AC PERFORMANCE
The OP97's ac characteristics are highly stable over its full operating temperature range. Unity-gain small-signal response is shown in Figure 2. Extremely tolerant of capacitive loading on the output, the OP97 displays excellent response even with 1000 pF loads (Figure 3). In large-signal applications, the input protection diodes effectively short the input to the output during the transients if the amplifier is connected in the usual unitygain configuration. The output enters short-circuit current limit, with the flow going through the protection diodes. Improved large-signal transient response is obtained by using a feedback resistor between the output and the inverting input. Figure 4 shows the large-signal response of the OP97 in unity gain with a 10 k feedback resistor. The unity-gain follower circuit is shown in Figure 5. The overcompensation pin may be used to increase the phase margin of the OP97 or to decrease gain-bandwidth product at gains greater than 10.
OP97
COC
-V
Figure 1. Optional Input Offset Voltage Nulling and Overcompensation Circuits
Figure 3. Small-Signal Transient Response (CLOAD = 1000 pF, AVCL = 1)
Figure 2. Small-Signal Transient Response (CLOAD = 100 pF, AVCL = 1)
Figure 4. Large-Signal Transient Response (AVCL = 1)
REV. E
-7-
OP97
10k
RFB
2 OP97 VIN 3 6
30pF IO 2 OP97 3 IO 6 VOUT
PM7548
VOUT
Figure 5. Unity-Gain Follower
DIGITAL INPUTS
Figure 7. DAC Output Amplifier
R1 10k V1 R2 10k R3 10k 2 7 OP97 3 4 -15V 6 VOUT R5 10k +15V RL IL
Figure 6. Small-Signal Transient Response with Overcompensation (CLOAD = 1000 pF, AVCL = 1, COC = 220 pF)
GUARDING AND SHIELDING
R4 10k
Figure 8. Current Monitor
To maintain the extremely high input impedances of the OP97, care must be taken in circuit board layout and manufacturing. Board surfaces must be kept scrupulously clean and free of moisture. Conformal coating is recommended to provide a humidity barrier. Even a clean PC board can have 100 pA of leakage currents between adjacent traces, so that guard rings should be used around the inputs. Guard traces are operated at a voltage close to that on the inputs, so that leakage currents become minimal. In noninverting applications, the guard ring should be connected to the common-mode voltage at the inverting input (Pin 2). In inverting applications, both inputs remain at ground, so that the guard trace should be grounded. Guard traces should be made on both sides of the circuit board.
High impedance circuitry is extremely susceptible to RF pickup, line frequency hum, and radiated noise from switching power supplies. Enclosing sensitive analog sections within grounded shields is generally necessary to prevent excessive noise pickup. Twisted-pair cable will aid in rejection of line frequency hum. The OP97 is an excellent choice as an output amplifier for higher resolution CMOS DACs. Its tightly trimmed offset voltage and minimal bias current result in virtually no degradation of linearity, even over wide temperature ranges. Figure 8 shows a versatile monitor circuit that can typically sense current at any point between the 15 V supplies. This makes it ideal for sensing current in applications such as full bridge drivers where bidirectional current is associated with large common-mode voltage changes. The 114 dB CMRR of the OP97 makes the amplifier's contribution to common-mode error negligible, leaving only the error due to the resistor ratio inequality. Ideally, R2/R4 = R3/R5.
UNITY-GAIN FOLLOWER
NONINVERTING AMPLIFIER
2 OP97 3 6
2 OP97 3 6
INVERTING AMPLIFIER
PDIP BOTTOM VIEW 8 6 1
2 OP97 3
Figure 9. Guard Ring Layout and Connections
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REV. E
OP97
The digitally programmable gain amplifier shown in Figure 10 has 12-bit gain resolution with 10-bit gain linearity over the range of -1 to -1024. The low bias current of the OP97 maintains this linearity, while C1 limits the noise voltage bandwidth allowing accurate measurement down to microvolt levels. DIGITAL IN 4095 2048 1024 512 256 128 64 32 16 8 4 2 1 0 GAIN (Av)
10k R2 20k 5pF VIN R1 2k 1F 10k 3 2 OP97 3 5 0.1 F 6 AV = R2 R1 2 OP44 6 VOUT
-1.00024 -2 -4 -8 -16 -32 -64 -128 -256 -512 -1024 -2048 -4096 Open Loop
Figure 11. Combination High-Speed, Precision Amplifier
Many high speed amplifiers suffer from less-than-perfect low frequency performance. A combination amplifier consisting of a high precision, slow device like the OP97 and a faster device such as the OP44 results in uniformly accurate performance from dc to the high frequency limit of the OP44, which has a gain-bandwidth product of 23 MHz. The circuit shown in Figure 11 accomplishes this, with the OP44 providing high frequency amplification and the OP97 operating on low frequency signals and providing offset correction. Offset voltage and drift of the circuit are controlled by the OP97.
+15V
Figure 12. Combination Amplifier Transient Response
VIN 2.5mV TO 10V RANGE DEPENDING ON GAIN SETTING 1 2 3 IOUT 2 PM7541 C1 220pF +15V 2 OP97 3 0.1 F -15V 6 0.1 F 18 RFB IOUT 1 VREF 17 16
0.1 F
VOUT
Figure 10. Precision Programmable Gain Amplifier
REV. E
-9-
OP97
OUTLINE DIMENSIONS
8-Lead Plastic Dual In-Line Package [PDIP] P-Suffix (N-8)
Dimensions shown in inches and (millimeters)
0.375 (9.53) 0.365 (9.27) 0.355 (9.02)
8 5
1
4
0.295 (7.49) 0.285 (7.24) 0.275 (6.98) 0.325 (8.26) 0.310 (7.87) 0.300 (7.62) 0.015 (0.38) MIN SEATING PLANE 0.060 (1.52) 0.050 (1.27) 0.045 (1.14)
0.100 (2.54) BSC 0.180 (4.57) MAX 0.150 (3.81) 0.130 (3.30) 0.110 (2.79) 0.022 (0.56) 0.018 (0.46) 0.014 (0.36)
0.150 (3.81) 0.135 (3.43) 0.120 (3.05)
0.015 (0.38) 0.010 (0.25) 0.008 (0.20)
COMPLIANT TO JEDEC STANDARDS MO-095AA CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
8-Lead Standard Small Outline Package [SOIC] Narrow Body S-Suffix (R-8)
Dimensions shown in millimeters and (inches)
5.00 (0.1968) 4.80 (0.1890)
8 5 4
4.00 (0.1574) 3.80 (0.1497)
1
6.20 (0.2440) 5.80 (0.2284)
1.27 (0.0500) BSC 0.25 (0.0098) 0.10 (0.0040) COPLANARITY SEATING 0.10 PLANE
1.75 (0.0688) 1.35 (0.0532) 8 0.25 (0.0098) 0 0.17 (0.0067)
0.50 (0.0196) 0.25 (0.0099)
45
0.51 (0.0201) 0.31 (0.0122)
1.27 (0.0500) 0.40 (0.0157)
COMPLIANT TO JEDEC STANDARDS MS-012AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
-10-
REV. E
OP97 Revision History
Location 7/03--Data Sheet changed from REV. D to REV. E. Page
Deleted H-08A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Universal Deleted Q-8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Universal Deleted E-20A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Universal Deleted DIE CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Deleted WAFER TEST LIMITS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Updated TPC 14 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Updated OUTLINE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
1/02--Data Sheet changed from REV. C to REV. D.
Edits to Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Edits to Ordering Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Deleted DICE CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Deleted WAFER TEST LIMITS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Edits to APPLICATION INFORMATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
REV. E
-11-
-12-
C00299-0-7/03(E)
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